Rename "perfctr_l2" to "perfctr_llc"

910448bbed066ab1082b510eef1ae61bb792d854 ("perf/x86/amd/uncore: Rename
cpufeatures macro for cache counters") in 4.14 changed the name.

We change both the internal and cpuinfo name. As the upstream commit
states, "In Family 17h, L3 is the last level cache as opposed to L2 in
previous families. Avoid this name confusion ..."

PiperOrigin-RevId: 234698034
Change-Id: Ibf2efd4c0b83c1a8b5bb123da65ea1d7c6acd778
This commit is contained in:
Michael Pratt 2019-02-19 16:31:18 -08:00 committed by Shentubot
parent 2840f7c1b1
commit 0b310ada5b
2 changed files with 7 additions and 2 deletions

View File

@ -226,7 +226,7 @@ const (
_ // ecx bit 25 is reserved.
X86FeatureBPEXT
X86FeaturePERFCTR_TSC
X86FeaturePERFCTR_L2
X86FeaturePERFCTR_LLC
X86FeatureMWAITX
// ECX[31:30] are reserved.
)
@ -387,7 +387,7 @@ var x86FeatureStrings = map[Feature]string{
X86FeaturePERFCTR_NB: "perfctr_nb",
X86FeatureBPEXT: "bpext",
X86FeaturePERFCTR_TSC: "ptsc",
X86FeaturePERFCTR_L2: "perfctr_l2",
X86FeaturePERFCTR_LLC: "perfctr_llc",
X86FeatureMWAITX: "mwaitx",
// Block 6.

View File

@ -124,6 +124,11 @@ func TestHostFeatureFlags(t *testing.T) {
// XSAVES only exposed in
// b8be15d588060a03569ac85dc4a0247460988f5b (4.8).
continue
// Block 5.
case f == X86FeaturePERFCTR_LLC && (major < 4 || major == 4 && minor < 14):
// PERFCTR_LLC renamed in
// 910448bbed066ab1082b510eef1ae61bb792d854 (4.14).
continue
}
hidden := f.flagString(true) == ""