Commit Graph

272 Commits

Author SHA1 Message Date
Andrei Vagin 48ea2c34d1 platform/ptrace: workaround a kernel ptrace issue on ARM64
On ARM64, when ptrace stops on a system call, it uses the x7 register to
indicate whether the stop has been signalled from syscall entry or syscall
exit. This means that we can't get a value of this register and we can't change
it. More details are in the comment for tracehook_report_syscall in
arch/arm64/kernel/ptrace.c.

This happens only if we stop on a system call, so let's queue a signal, resume
a stub thread and catch it on a signal handling.

Fixes: #5238
PiperOrigin-RevId: 352668695
2021-01-19 15:34:02 -08:00
gVisor bot 64bff178b8 Merge pull request #4792 from lubinszARM:pr_kvm_test
PiperOrigin-RevId: 351638451
2021-01-13 12:12:26 -08:00
Adin Scannell 4e03e87547 Fix simple mistakes identified by goreportcard.
These are primarily simplification and lint mistakes. However, minor
fixes are also included and tests added where appropriate.

PiperOrigin-RevId: 351425971
2021-01-12 12:38:22 -08:00
Adin Scannell a20da70829 Fix Go branch for arm64.
This requires several changes:
* Templates must preserve relevant tags.
* Pagetables templates are split into two targets, each preserving tags.
* The binary VDSO is similarly split into two targets, with some juggling.
* The top level tools/go_branch.sh now does a crossbuild of ARM64 as well,
  and checks and merges the results of the two branches together.

Fixes #5178

PiperOrigin-RevId: 351304330
2021-01-11 22:33:36 -08:00
gVisor bot 70de1db82e Merge pull request #4933 from lubinszARM:pr_kvm_el0_exceptions
PiperOrigin-RevId: 350862699
2021-01-08 17:08:36 -08:00
Robin Luk 7e91b3cdec arm64 kvm: revert some kpti related codes, and configure upper pagetable as global
In order to improve the performance, some kpti related codes(TCR.A1) have
been reverted, and set kernel pagetable as global.

Signed-off-by: Robin Luk <lubin.lu@antgroup.com>
2020-12-29 19:35:17 +08:00
gVisor bot 2ec6e44c9e Merge pull request #4880 from lubinszARM:pr_tlbi_02
PiperOrigin-RevId: 347890782
2020-12-16 13:52:58 -08:00
gVisor bot 5843a5007c Merge pull request #4722 from zhlhahaha:2010
PiperOrigin-RevId: 347660920
2020-12-15 11:54:04 -08:00
Adin Scannell 4cba3904f4 Remove existing nogo exceptions.
PiperOrigin-RevId: 347047550
2020-12-11 12:06:49 -08:00
Andrei Vagin 658f874b94 Prepare for supporting cross compilation.
PiperOrigin-RevId: 346496532
2020-12-09 15:51:33 -08:00
gVisor bot d574666dea Merge pull request #4908 from lubinszARM:pr_kvm_ext_dabt
PiperOrigin-RevId: 346143528
2020-12-07 11:48:36 -08:00
gVisor bot 7527371f0f Merge pull request #4874 from zhlhahaha:2022
PiperOrigin-RevId: 346134026
2020-12-07 11:11:17 -08:00
Dean Deng 6b1dbbbdc8 Fix typo in ptrace documentation.
PiperOrigin-RevId: 344958513
2020-11-30 23:16:39 -08:00
Robin Luk 3868c7dd40 arm64 kvm: add more handling of el0_exceptions
Add more comments and more handling for exceptions.

Signed-off-by: Robin Luk <lubin.lu@antgroup.com>
2020-11-25 14:36:41 +08:00
Robin Luk 6a85d13ccf arm64 kvm: add to ext_dabt injection support
If no vild syndrome(data abort outside memslots) was reported by kvm, let userspace to do the
ext_dabt injection to bail out this issue.

Signed-off-by: Robin Luk <lubin.lu@antgroup.com>
2020-11-23 16:47:19 +08:00
Robin Luk 4f79706ccd arm64 tlb: add support for tlbi-vale1ls/tlbi-aside1ls
This patch adds support for tlbi-vale1ls/tlbi-aside1ls.
And make the code consistent with the flush strategy of the x86 platform.

Signed-off-by: Robin Luk <lubin.lu@antgroup.com>
2020-11-19 17:58:27 +08:00
Howard Zhang 84b1fb42c2 ARM64 kvm: apply PCALIGN for exception vector alignment
As PCALIGN is available on golang asm for arm64.
https://golang.org/pkg/cmd/internal/obj/arm64/

No need to use rewriteVectors() to ensure
alignment of exception vector.

Signed-off-by: Howard Zhang <howard.zhang@arm.com>
2020-11-19 10:40:34 +08:00
gVisor bot c978ab0471 Merge pull request #4791 from lubinszARM:pr_pt_upper
PiperOrigin-RevId: 343130667
2020-11-18 12:20:22 -08:00
gVisor bot ee6dd8cb97 Merge pull request #4840 from lubinszARM:pr_fpsimd_1
PiperOrigin-RevId: 343000335
2020-11-17 20:12:23 -08:00
Robin Luk 05d5e3cb2b arm64 kvm: optimize all fpsimd related code
Optimize and bug fix all fpsimd related code.

Signed-off-by: Robin Luk <lubin.lu@antgroup.com>
2020-11-17 16:55:56 +08:00
Robin Luk 170b584222 arm64 kvm: add the processing functions for all el0/el1 exceptions
I added 2 unified processing functions for all exceptions of el/el0

Signed-off-by: Robin Luk <lubin.lu@antgroup.com>
2020-11-17 14:54:33 +08:00
Bin Lu c755eaff1c arm64 kvm bug fix: pagetables_test & kvm_test failed due to upper-shared-pt feature
Signed-off-by: Robin Luk <lubin.lu@alibaba-inc.com>
2020-11-12 08:00:36 +00:00
Robin Luk b7de12fc03 kvm-test: adjust the check logic in TestWrongVCPU case
Signed-off-by: Robin Luk <lubin.lu@alibaba-inc.com>
2020-11-12 03:52:37 +00:00
gVisor bot d4e0b829e4 Merge pull request #4683 from lemin9538:lemin_fpsmid_fix
PiperOrigin-RevId: 341445910
2020-11-09 11:19:14 -08:00
gVisor bot 861c11bfa7 Merge pull request #3617 from laijs:upperhalf
PiperOrigin-RevId: 340484823
2020-11-03 11:19:04 -08:00
lubinszARM 0e96f8065e arm64 kvm: inject sError to trigger sigbus
Use an sErr injection to trigger sigbus when we receive EFAULT from the
run ioctl.

After applying this patch, mmap_test_runsc_kvm will be passed on
Arm64.

Signed-off-by: Bin Lu <bin.lu@arm.com>
COPYBARA_INTEGRATE_REVIEW=https://github.com/google/gvisor/pull/4542 from lubinszARM:pr_kvm_mmap_1 f81bd42466d1d60a581e5fb34de18b78878c68c1
PiperOrigin-RevId: 340461239
2020-11-03 09:34:39 -08:00
Howard Zhang d0f8b3174e ARM64: follow nogo rules add function description
Signed-off-by: Howard Zhang <howard.zhang@arm.com>
2020-11-03 14:28:56 +08:00
Lai Jiangshan 3425485b7c kvm: share upper halves among all pagtables
Fixes: #509

Signed-off-by: Lai Jiangshan <jiangshan.ljs@antfin.com>
Signed-off-by: Lai Jiangshan <laijs@linux.alibaba.com>
2020-11-03 00:10:32 +08:00
gVisor bot c94bf137da Merge pull request #4564 from zhlhahaha:1981
PiperOrigin-RevId: 339921446
2020-10-30 12:45:24 -07:00
Min Le 185b88ecb8 arm64: fix the fpsmid context save/restore issue
current when save fpsmid register is using following
instruction:

	# FMOVD Fx, 16*1(R0)

this instruction will compiled to:

	# str     Dx, [x0, #16]

Dx is 64bit fp register not 128bit, then upper 64bit data
will be lossed, this will cause application meet many random
crash issue. need use 128bit register Vx or Q0 to save and
restore the fpsmid context.

Signed-off-by: Min Le <lemin.lm@antgroup.com>
2020-10-29 22:34:38 +08:00
gVisor bot d20ef61a83 Merge pull request #4630 from lemin9538:lemin_arm64_dev
PiperOrigin-RevId: 339540747
2020-10-28 14:42:18 -07:00
Min Le c534c91b86 arm64: need to restore the sentry's TLS when in EL1
Signed-off-by: Min Le <lemin.lm@antgroup.com>
2020-10-28 14:10:35 +08:00
Bin Lu 56b5c71bac arm64 kvm: added the implementation of setSystemTimeLegacy()
I have added support for setSystemTimeLegacy() by setting cntvoff.

With this pr, TestRdtsc and other kvm syscall test cases(nanosleep,
wait...) can be passed on Arm64.

TO-DO: Add precise synchronization to KVM for Arm64.
Reference PR: https://github.com/google/gvisor/pull/4397

Signed-off-by: Bin Lu <bin.lu@arm.com>
2020-10-22 01:46:09 -04:00
gVisor bot 1b2097f84e Merge pull request #4535 from lubinszARM:pr_kvm_exec_binary_1
PiperOrigin-RevId: 338321125
2020-10-21 12:53:11 -07:00
gVisor bot d45d57f49e Merge pull request #4524 from lemin9538:lemin_arm64
PiperOrigin-RevId: 338126491
2020-10-20 13:32:18 -07:00
Howard Zhang d7ea53769f ARM64 KVM: bad regs.Sp return SIGSEGV
Consistent with the linux kernel, bad regs.Sp
return SIGSEGV

Signed-off-by: Howard Zhang <howard.zhang@arm.com>
2020-10-20 15:50:09 +08:00
Bin Lu 3b735c8fec arm64 kvm: handle exception from accessing undefined instruction
Consistent with the linux approach, we will produce a sigill to handle
el0_undef.

After applying this patch, exec_binary_test_runsc_kvm will be passed on
Arm64.

Signed-off-by: Bin Lu <bin.lu@arm.com>
2020-10-18 21:47:12 -04:00
gVisor bot b491712e11 Merge pull request #4387 from lubinszARM:pr_tls_host_sentry_1
PiperOrigin-RevId: 337544656
2020-10-16 11:32:38 -07:00
Min Le 4f077b9a7e arm64: the ASID offset of TTBR register is 48
Signed-off-by: Min Le <lemin.lm@antgroup.com>
2020-10-15 13:48:06 +08:00
gVisor bot 7eeeff4268 Merge pull request #4482 from lemin9538:lemin_arm64
PiperOrigin-RevId: 336976081
2020-10-13 16:12:20 -07:00
gVisor bot dbe122c92f Merge pull request #4386 from lubinszARM:pr_testutil_tls_usr
PiperOrigin-RevId: 336970511
2020-10-13 15:42:24 -07:00
gVisor bot b99f15e06d Merge pull request #4374 from lubinszARM:pr_ffmpeg_kvm_01
PiperOrigin-RevId: 336962937
2020-10-13 15:02:57 -07:00
Adin Scannell d9b32efb30 Avoid excessive Tgkill and wait operations.
The required states may simply not be observed by the thread running bounce, so
track guest and user generations to ensure that at least one of the desired
state transitions happens.

Fixes #3532

PiperOrigin-RevId: 336908216
2020-10-13 10:43:45 -07:00
gVisor bot 93bc0777be Merge pull request #4072 from adamliyi:droppt_fix
PiperOrigin-RevId: 336719900
2020-10-12 12:34:43 -07:00
Bin Lu 1557153cad arm64 kvm: add tls-usr support
The tls of guest-el1-sentry and host-el0-sentry may be different on Arm64.
I added a solution for it.

Signed-off-by: Bin Lu <bin.lu@arm.com>
2020-10-11 23:32:54 -04:00
Min Le 2ae97b27aa arm64: set DZE bit to make EL0 can use DC ZVA
Signed-off-by: Min Le <lemin.lm@antgroup.com>
2020-10-10 16:50:51 +08:00
Andrei Vagin a0ffc84adf platform/kvm: remove the unused field
PiperOrigin-RevId: 336366624
2020-10-09 14:34:51 -07:00
gVisor bot 6df400dfb6 Merge pull request #4040 from lemin9538:lemin_arm64
PiperOrigin-RevId: 336362818
2020-10-09 14:14:03 -07:00
Min Le 190cf30e41 arm64: the mair_el1 value is wrong
the correct value needed is 0xbbff440c0400 but the const
defined is 0x000000000000ffc0 due to the operator error
in _MT_EL1_INIT, both kernel and user space memory
attribute should be Normal memory not DEVICE_nGnRE

Signed-off-by: Min Le <lemin.lm@antgroup.com>
2020-10-08 20:33:09 +08:00
gVisor bot b89e43e200 Merge pull request #4376 from lubinszARM:pr_usr_tls_new
PiperOrigin-RevId: 335930035
2020-10-07 12:42:35 -07:00