gvisor

Commit Graph

Author	SHA1	Message	Date
Adin Scannell	4e6a1a5adb	Automated rollback of changelist 303799678 PiperOrigin-RevId: 304221302	2020-04-01 11:06:26 -07:00
Adin Scannell	3fac85da95	kvm: handle exit reasons even under EINTR. In the case of other signals (preemption), inject a normal bounce and defer the signal until the vCPU has been returned from guest mode. PiperOrigin-RevId: 303799678	2020-03-30 12:37:57 -07:00
gVisor bot	906eb6295d	atomicbitops package cleanups - Redocument memory ordering from "no ordering" to "acquire-release". (No functional change: both LOCK WHATEVER on x86, and LDAXR/STLXR loops on ARM64, already have this property.) - Remove IncUnlessZeroInt32 and DecUnlessOneInt32, which were only faster than the equivalent loops using sync/atomic before the Go compiler inlined non-unsafe.Pointer atomics many releases ago. PiperOrigin-RevId: 295811743	2020-02-18 13:43:28 -08:00

Author

SHA1

Message

Date

Adin Scannell

4e6a1a5adb

Automated rollback of changelist 303799678

PiperOrigin-RevId: 304221302

2020-04-01 11:06:26 -07:00

Adin Scannell

3fac85da95

kvm: handle exit reasons even under EINTR.

In the case of other signals (preemption), inject a normal bounce and
defer the signal until the vCPU has been returned from guest mode.

PiperOrigin-RevId: 303799678

2020-03-30 12:37:57 -07:00

gVisor bot

906eb6295d

atomicbitops package cleanups

- Redocument memory ordering from "no ordering" to "acquire-release". (No
  functional change: both LOCK WHATEVER on x86, and LDAXR/STLXR loops on ARM64,
  already have this property.)

- Remove IncUnlessZeroInt32 and DecUnlessOneInt32, which were only faster than
  the equivalent loops using sync/atomic before the Go compiler inlined
  non-unsafe.Pointer atomics many releases ago.

PiperOrigin-RevId: 295811743

2020-02-18 13:43:28 -08:00

3 Commits