28 lines
942 B
ArmAsm
28 lines
942 B
ArmAsm
// Copyright 2018 The gVisor Authors.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "textflag.h"
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TEXT ·Rdtsc(SB),NOSPLIT,$0-8
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// N.B. We need LFENCE on Intel, AMD is more complicated.
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// Modern AMD CPUs with modern kernels make LFENCE behave like it does
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// on Intel with MSR_F10H_DECFG_LFENCE_SERIALIZE_BIT. MFENCE is
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// otherwise needed on AMD.
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LFENCE
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RDTSC
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SHLQ $32, DX
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ADDQ DX, AX
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MOVQ AX, ret+0(FP)
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RET
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