484 lines
14 KiB
Go
484 lines
14 KiB
Go
// Copyright 2020 The gVisor Authors.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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// +build arm64
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package cpuid
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import (
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"bytes"
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"encoding/binary"
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"fmt"
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"io/ioutil"
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"strconv"
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"strings"
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"gvisor.dev/gvisor/pkg/log"
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)
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// ARM64 doesn't have a 'cpuid' equivalent, which means it have no architected
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// discovery mechanism for hardware features available to userspace code at EL0.
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// The kernel exposes the presence of these features to userspace through a set
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// of flags(HWCAP/HWCAP2) bits, exposed in the auxilliary vector.
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// Ref Documentation/arm64/elf_hwcaps.rst for more info.
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//
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// Currently, only the HWCAP bits are supported.
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const (
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// ARM64FeatureFP indicates support for single and double precision
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// float point types.
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ARM64FeatureFP Feature = iota
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// ARM64FeatureASIMD indicates support for Advanced SIMD with single
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// and double precision float point arithmetic.
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ARM64FeatureASIMD
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// ARM64FeatureEVTSTRM indicates support for the generic timer
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// configured to generate events at a frequency of approximately
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// 100KHz.
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ARM64FeatureEVTSTRM
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// ARM64FeatureAES indicates support for AES instructions
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// (AESE/AESD/AESMC/AESIMC).
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ARM64FeatureAES
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// ARM64FeaturePMULL indicates support for AES instructions
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// (PMULL/PMULL2).
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ARM64FeaturePMULL
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// ARM64FeatureSHA1 indicates support for SHA1 instructions
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// (SHA1C/SHA1P/SHA1M etc).
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ARM64FeatureSHA1
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// ARM64FeatureSHA2 indicates support for SHA2 instructions
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// (SHA256H/SHA256H2/SHA256SU0 etc).
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ARM64FeatureSHA2
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// ARM64FeatureCRC32 indicates support for CRC32 instructions
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// (CRC32B/CRC32H/CRC32W etc).
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ARM64FeatureCRC32
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// ARM64FeatureATOMICS indicates support for atomic instructions
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// (LDADD/LDCLR/LDEOR/LDSET etc).
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ARM64FeatureATOMICS
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// ARM64FeatureFPHP indicates support for half precision float point
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// arithmetic.
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ARM64FeatureFPHP
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// ARM64FeatureASIMDHP indicates support for ASIMD with half precision
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// float point arithmetic.
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ARM64FeatureASIMDHP
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// ARM64FeatureCPUID indicates support for EL0 access to certain ID
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// registers is available.
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ARM64FeatureCPUID
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// ARM64FeatureASIMDRDM indicates support for SQRDMLAH and SQRDMLSH
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// instructions.
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ARM64FeatureASIMDRDM
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// ARM64FeatureJSCVT indicates support for the FJCVTZS instruction.
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ARM64FeatureJSCVT
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// ARM64FeatureFCMA indicates support for the FCMLA and FCADD
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// instructions.
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ARM64FeatureFCMA
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// ARM64FeatureLRCPC indicates support for the LDAPRB/LDAPRH/LDAPR
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// instructions.
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ARM64FeatureLRCPC
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// ARM64FeatureDCPOP indicates support for DC instruction (DC CVAP).
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ARM64FeatureDCPOP
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// ARM64FeatureSHA3 indicates support for SHA3 instructions
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// (EOR3/RAX1/XAR/BCAX).
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ARM64FeatureSHA3
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// ARM64FeatureSM3 indicates support for SM3 instructions
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// (SM3SS1/SM3TT1A/SM3TT1B).
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ARM64FeatureSM3
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// ARM64FeatureSM4 indicates support for SM4 instructions
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// (SM4E/SM4EKEY).
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ARM64FeatureSM4
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// ARM64FeatureASIMDDP indicates support for dot product instructions
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// (UDOT/SDOT).
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ARM64FeatureASIMDDP
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// ARM64FeatureSHA512 indicates support for SHA2 instructions
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// (SHA512H/SHA512H2/SHA512SU0).
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ARM64FeatureSHA512
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// ARM64FeatureSVE indicates support for Scalable Vector Extension.
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ARM64FeatureSVE
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// ARM64FeatureASIMDFHM indicates support for FMLAL and FMLSL
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// instructions.
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ARM64FeatureASIMDFHM
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)
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// ELF auxiliary vector tags
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const (
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_AT_NULL = 0 // End of vector
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_AT_HWCAP = 16 // hardware capability bit vector
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_AT_HWCAP2 = 26 // hardware capability bit vector 2
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)
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// These should not be changed after they are initialized.
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var hwCap uint
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// To make emulation of /proc/cpuinfo easy, these names match the names of the
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// basic features in Linux defined in arch/arm64/kernel/cpuinfo.c.
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var arm64FeatureStrings = map[Feature]string{
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ARM64FeatureFP: "fp",
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ARM64FeatureASIMD: "asimd",
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ARM64FeatureEVTSTRM: "evtstrm",
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ARM64FeatureAES: "aes",
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ARM64FeaturePMULL: "pmull",
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ARM64FeatureSHA1: "sha1",
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ARM64FeatureSHA2: "sha2",
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ARM64FeatureCRC32: "crc32",
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ARM64FeatureATOMICS: "atomics",
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ARM64FeatureFPHP: "fphp",
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ARM64FeatureASIMDHP: "asimdhp",
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ARM64FeatureCPUID: "cpuid",
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ARM64FeatureASIMDRDM: "asimdrdm",
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ARM64FeatureJSCVT: "jscvt",
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ARM64FeatureFCMA: "fcma",
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ARM64FeatureLRCPC: "lrcpc",
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ARM64FeatureDCPOP: "dcpop",
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ARM64FeatureSHA3: "sha3",
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ARM64FeatureSM3: "sm3",
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ARM64FeatureSM4: "sm4",
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ARM64FeatureASIMDDP: "asimddp",
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ARM64FeatureSHA512: "sha512",
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ARM64FeatureSVE: "sve",
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ARM64FeatureASIMDFHM: "asimdfhm",
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}
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var (
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cpuFreqMHz float64
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cpuImplHex uint64
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cpuArchDec uint64
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cpuVarHex uint64
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cpuPartHex uint64
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cpuRevDec uint64
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)
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// arm64FeaturesFromString includes features from arm64FeatureStrings.
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var arm64FeaturesFromString = make(map[string]Feature)
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// FeatureFromString returns the Feature associated with the given feature
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// string plus a bool to indicate if it could find the feature.
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func FeatureFromString(s string) (Feature, bool) {
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f, b := arm64FeaturesFromString[s]
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return f, b
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}
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// String implements fmt.Stringer.
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func (f Feature) String() string {
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if s := f.flagString(); s != "" {
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return s
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}
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return fmt.Sprintf("<cpuflag %d>", f)
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}
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func (f Feature) flagString() string {
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if s, ok := arm64FeatureStrings[f]; ok {
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return s
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}
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return ""
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}
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// FeatureSet is a set of Features for a CPU.
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//
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// +stateify savable
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type FeatureSet struct {
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// Set is the set of features that are enabled in this FeatureSet.
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Set map[Feature]bool
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// CPUImplementer is part of the processor signature.
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CPUImplementer uint8
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// CPUArchitecture is part of the processor signature.
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CPUArchitecture uint8
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// CPUVariant is part of the processor signature.
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CPUVariant uint8
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// CPUPartnum is part of the processor signature.
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CPUPartnum uint16
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// CPURevision is part of the processor signature.
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CPURevision uint8
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}
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// CheckHostCompatible returns nil if fs is a subset of the host feature set.
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// Noop on arm64.
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func (fs *FeatureSet) CheckHostCompatible() error {
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return nil
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}
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// ExtendedStateSize returns the number of bytes needed to save the "extended
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// state" for this processor and the boundary it must be aligned to. Extended
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// state includes floating point(NEON) registers, and other cpu state that's not
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// associated with the normal task context.
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func (fs *FeatureSet) ExtendedStateSize() (size, align uint) {
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// ARMv8 provide 32x128bits NEON registers.
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//
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// Ref arch/arm64/include/uapi/asm/ptrace.h
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// struct user_fpsimd_state {
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// __uint128_t vregs[32];
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// __u32 fpsr;
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// __u32 fpcr;
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// __u32 __reserved[2];
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// };
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return 528, 16
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}
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// HasFeature tests whether or not a feature is in the given feature set.
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func (fs *FeatureSet) HasFeature(feature Feature) bool {
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return fs.Set[feature]
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}
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// UseXsave returns true if 'fs' supports the "xsave" instruction.
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//
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// Irrelevant on arm64.
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func (fs *FeatureSet) UseXsave() bool {
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return false
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}
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// FlagsString prints out supported CPU "flags" field in /proc/cpuinfo.
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func (fs *FeatureSet) FlagsString() string {
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var s []string
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for f := range arm64FeatureStrings {
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if fs.Set[f] {
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if fstr := f.flagString(); fstr != "" {
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s = append(s, fstr)
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}
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}
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}
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return strings.Join(s, " ")
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}
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// WriteCPUInfoTo is to generate a section of one cpu in /proc/cpuinfo. This is
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// a minimal /proc/cpuinfo, and the bogomips field is simply made up.
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func (fs FeatureSet) WriteCPUInfoTo(cpu uint, b *bytes.Buffer) {
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fmt.Fprintf(b, "processor\t: %d\n", cpu)
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fmt.Fprintf(b, "BogoMIPS\t: %.02f\n", cpuFreqMHz) // It's bogus anyway.
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fmt.Fprintf(b, "Features\t\t: %s\n", fs.FlagsString())
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fmt.Fprintf(b, "CPU implementer\t: 0x%x\n", cpuImplHex)
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fmt.Fprintf(b, "CPU architecture\t: %d\n", cpuArchDec)
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fmt.Fprintf(b, "CPU variant\t: 0x%x\n", cpuVarHex)
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fmt.Fprintf(b, "CPU part\t: 0x%x\n", cpuPartHex)
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fmt.Fprintf(b, "CPU revision\t: %d\n", cpuRevDec)
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fmt.Fprintln(b, "") // The /proc/cpuinfo file ends with an extra newline.
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}
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// HostFeatureSet uses hwCap to get host values and construct a feature set
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// that matches that of the host machine.
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func HostFeatureSet() *FeatureSet {
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s := make(map[Feature]bool)
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for f := range arm64FeatureStrings {
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if hwCap&(1<<f) != 0 {
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s[f] = true
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}
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}
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return &FeatureSet{
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Set: s,
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CPUImplementer: uint8(cpuImplHex),
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CPUArchitecture: uint8(cpuArchDec),
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CPUVariant: uint8(cpuVarHex),
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CPUPartnum: uint16(cpuPartHex),
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CPURevision: uint8(cpuRevDec),
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}
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}
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// Reads bogomips from host /proc/cpuinfo. Must run before syscall filter
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// installation. This value is used to create the fake /proc/cpuinfo from a
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// FeatureSet.
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func initCPUInfo() {
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cpuinfob, err := ioutil.ReadFile("/proc/cpuinfo")
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if err != nil {
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// Leave it as 0. The standalone VDSO bails out in the same way.
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log.Warningf("Could not read /proc/cpuinfo: %v", err)
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return
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}
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cpuinfo := string(cpuinfob)
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// We get the value straight from host /proc/cpuinfo.
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for _, line := range strings.Split(cpuinfo, "\n") {
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switch {
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case strings.Contains(line, "BogoMIPS"):
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{
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splitMHz := strings.Split(line, ":")
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if len(splitMHz) < 2 {
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log.Warningf("Could not read /proc/cpuinfo: malformed BogoMIPS")
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break
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}
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// If there was a problem, leave cpuFreqMHz as 0.
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var err error
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cpuFreqMHz, err = strconv.ParseFloat(strings.TrimSpace(splitMHz[1]), 64)
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if err != nil {
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log.Warningf("Could not parse BogoMIPS value %v: %v", splitMHz[1], err)
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cpuFreqMHz = 0
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}
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}
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case strings.Contains(line, "CPU implementer"):
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{
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splitImpl := strings.Split(line, ":")
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if len(splitImpl) < 2 {
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log.Warningf("Could not read /proc/cpuinfo: malformed CPU implementer")
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break
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}
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// If there was a problem, leave cpuImplHex as 0.
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var err error
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cpuImplHex, err = strconv.ParseUint(strings.TrimSpace(splitImpl[1]), 0, 64)
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if err != nil {
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log.Warningf("Could not parse CPU implementer value %v: %v", splitImpl[1], err)
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cpuImplHex = 0
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}
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}
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case strings.Contains(line, "CPU architecture"):
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{
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splitArch := strings.Split(line, ":")
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if len(splitArch) < 2 {
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log.Warningf("Could not read /proc/cpuinfo: malformed CPU architecture")
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break
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}
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// If there was a problem, leave cpuArchDec as 0.
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var err error
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cpuArchDec, err = strconv.ParseUint(strings.TrimSpace(splitArch[1]), 0, 64)
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if err != nil {
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log.Warningf("Could not parse CPU architecture value %v: %v", splitArch[1], err)
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cpuArchDec = 0
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}
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}
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case strings.Contains(line, "CPU variant"):
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{
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splitVar := strings.Split(line, ":")
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if len(splitVar) < 2 {
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log.Warningf("Could not read /proc/cpuinfo: malformed CPU variant")
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break
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}
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// If there was a problem, leave cpuVarHex as 0.
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var err error
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cpuVarHex, err = strconv.ParseUint(strings.TrimSpace(splitVar[1]), 0, 64)
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if err != nil {
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log.Warningf("Could not parse CPU variant value %v: %v", splitVar[1], err)
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cpuVarHex = 0
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}
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}
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case strings.Contains(line, "CPU part"):
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{
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splitPart := strings.Split(line, ":")
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if len(splitPart) < 2 {
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log.Warningf("Could not read /proc/cpuinfo: malformed CPU part")
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break
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}
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// If there was a problem, leave cpuPartHex as 0.
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var err error
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cpuPartHex, err = strconv.ParseUint(strings.TrimSpace(splitPart[1]), 0, 64)
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if err != nil {
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log.Warningf("Could not parse CPU part value %v: %v", splitPart[1], err)
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cpuPartHex = 0
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}
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}
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case strings.Contains(line, "CPU revision"):
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{
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splitRev := strings.Split(line, ":")
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if len(splitRev) < 2 {
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log.Warningf("Could not read /proc/cpuinfo: malformed CPU revision")
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break
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}
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// If there was a problem, leave cpuRevDec as 0.
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var err error
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cpuRevDec, err = strconv.ParseUint(strings.TrimSpace(splitRev[1]), 0, 64)
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if err != nil {
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log.Warningf("Could not parse CPU revision value %v: %v", splitRev[1], err)
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cpuRevDec = 0
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}
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}
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}
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}
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}
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// The auxiliary vector of a process on the Linux system can be read
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// from /proc/self/auxv, and tags and values are stored as 8-bytes
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// decimal key-value pairs on the 64-bit system.
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//
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// $ od -t d8 /proc/self/auxv
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// 0000000 33 140734615224320
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// 0000020 16 3219913727
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// 0000040 6 4096
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// 0000060 17 100
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// 0000100 3 94665627353152
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// 0000120 4 56
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// 0000140 5 9
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// 0000160 7 140425502162944
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// 0000200 8 0
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// 0000220 9 94665627365760
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// 0000240 11 1000
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// 0000260 12 1000
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// 0000300 13 1000
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// 0000320 14 1000
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// 0000340 23 0
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// 0000360 25 140734614619513
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// 0000400 26 0
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// 0000420 31 140734614626284
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// 0000440 15 140734614619529
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// 0000460 0 0
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func initHwCap() {
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auxv, err := ioutil.ReadFile("/proc/self/auxv")
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if err != nil {
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log.Warningf("Could not read /proc/self/auxv: %v", err)
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return
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}
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l := len(auxv) / 16
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for i := 0; i < l; i++ {
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tag := binary.LittleEndian.Uint64(auxv[i*16:])
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val := binary.LittleEndian.Uint64(auxv[(i*16 + 8):])
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if tag == _AT_HWCAP {
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hwCap = uint(val)
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break
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}
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}
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}
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func initFeaturesFromString() {
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for f, s := range arm64FeatureStrings {
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arm64FeaturesFromString[s] = f
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}
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}
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func init() {
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initCPUInfo()
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initHwCap()
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initFeaturesFromString()
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}
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