gvisor/pkg/sentry/platform
Bin Lu 6d68834779 arm64:place an SB sequence following an ERET instruction
Some CPUs(eg: ampere-emag) can speculate past an ERET instruction and potentially perform
speculative accesses to memory before processing the exception return.
Since the register state is often controlled by a lower privilege level
at the point of an ERET, this could potentially be used as part of a
side-channel attack.

Signed-off-by: Bin Lu <bin.lu@arm.com>
2020-09-10 02:47:13 -04:00
..
interrupt Consistent precondition formatting 2020-08-20 13:32:24 -07:00
kvm Merge pull request #3742 from lubinszARM:pr_n1_1 2020-08-26 17:10:16 -07:00
ptrace Don't sched_setaffinity in ptrace platform. 2020-09-09 12:48:57 -07:00
ring0 arm64:place an SB sequence following an ERET instruction 2020-09-10 02:47:13 -04:00
BUILD Move platform.File in memmap 2020-07-27 11:59:10 -07:00
context.go Update package locations. 2020-01-27 15:31:32 -08:00
mmap_min_addr.go Update package locations. 2020-01-27 15:31:32 -08:00
platform.go Consistent precondition formatting 2020-08-20 13:32:24 -07:00