6d68834779
Some CPUs(eg: ampere-emag) can speculate past an ERET instruction and potentially perform speculative accesses to memory before processing the exception return. Since the register state is often controlled by a lower privilege level at the point of an ERET, this could potentially be used as part of a side-channel attack. Signed-off-by: Bin Lu <bin.lu@arm.com> |
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interrupt | ||
kvm | ||
ptrace | ||
ring0 | ||
BUILD | ||
context.go | ||
mmap_min_addr.go | ||
platform.go |